7.10. Thermal management (tsens, zones, mitigation)¶
The SoC’s thermal subsystem spans hardware (on-die temperature sensors and PMIC
ADC thermistor channels), the kernel (95 device-tree thermal zones and two
governors), and firmware throttle actors that were documented per-subsystem
elsewhere — LMh on the CPU clusters (Base kernel device tree (the SoC boot contract)), the AOP DDR manager
(AOP — the Always-On Processor (RPMh / power back-end)), and the CDSP HVX/sysmon throttle (ADSP and CDSP firmware).
This page ties those together into the thermal control loop. All addresses, zone
names, sensor bindings and trip temperatures are read directly from
artifacts/boot_a/board.dts; the userspace thermal-engine daemon that
consumes the monitor zones is out of scope (it is HLOS userspace) and is noted
only as the reader of those zones.
7.10.1. Temperature sensors¶
Two kinds of sensor feed the zones:
On-die TSENS — two qcom,tsens24xx controllers, each a SROT + TM register
pair, up to 16 sensors, with upper/lower, critical and 0 °C interrupts:
Controller |
Registers (SROT / TM) |
phandle |
Notes |
|---|---|---|---|
tsens0 |
|
|
|
tsens1 |
|
|
|
Zones reference these as thermal-sensors = <0x3a N> (tsens0, sensor N) or
<0x3b N> (tsens1). TSENS measures the silicon (CPU/GPU/DSP/DDR/AOSS dies).
PMIC ADC thermal-monitor — qcom,adc-tm5 (phandle 0x58, PMIC register
0x3500) exposes board thermistor channels through the PMIC’s VADC
(io-channels e.g. 0x4d, 0x4f). The board/skin zones
(chg-skin-therm, conn-therm, sdm-skin-therm, …) read these — physical
NTCs on the PCB, not die sensors. See PMIC reset timers, charging and reachability.
7.10.2. Thermal-zone taxonomy¶
The thermal-zones node defines 95 zones. Almost every heat-producing IP
has a pair — a *-usr monitor zone and a *-step mitigation zone — plus the
board thermistor zones. Categories:
Group |
Zones (examples) |
Sensed thing |
|---|---|---|
CPU cores |
|
per-core die temp of the 6+2 Kryo 660 cores (Base kernel device tree (the SoC boot contract)) |
GPU |
|
Adreno GPU die |
DSP / compute |
|
CDSP HVX, NPU, Venus, camera, ADSP audio |
Memory / always-on |
|
DRAM die (AOP-managed) and the always-on subsystem |
Connectivity |
|
WCN3990 combo (Bluetooth / FM controller firmware (WCN3990 “Cherokee”)) |
Board thermistors |
|
PCB skin/connector NTCs via PMIC ADC-TM5 |
Modem (dormant) |
|
stock SM6350 modem/mmWave RF thermal zones — unpopulated (no cellular RF), the same reference-base leftovers as the RF assets in ADSP and CDSP firmware |
The dormant modem-* set is the single largest category of thermal zones.
7.10.3. Monitoring vs. mitigation — the two governors¶
Each actor typically has two zones on the same sensor, differing only in governor:
*-usr—thermal-governor = "user_space"High trips (115 °C
reset-mon-cfg/ 125 °Cactive-config0,type = "passive"), reported to the HLOSthermal-enginefor policy. These are notification/monitor points, no in-kernel action. Example —cpu-0-0-usron tsens0 sensor 1;ddr-usron tsens1 sensor 3.*-step—thermal-governor = "step_wise"Lower trips (95–110 °C) that the in-kernel step-wise governor acts on directly by driving a bound cooling device. This is the automatic below-userspace mitigation. The cooling device each
-stepzone drives:
|
Trip |
Cooling device (throttle actor) |
|---|---|---|
|
110 °C |
the per-core CPU cooling device (cpufreq DCVS / core-isolation, e.g.
|
|
95 °C |
Adreno GPU DCVS (GPU node phandle |
|
95–100 °C |
a cascade from one compute sensor (tsens1 #4): CDSP DCVS ( |
(DDR has no -step cooling-map: DRAM thermal mitigation is done by the AOP
DDR manager’s own frequency/self-refresh control, ddr_temp in
AOP — the Always-On Processor (RPMh / power back-end), not by the kernel governor.)
7.10.4. The below-userspace thermal loop¶
The closed loop that runs without any userspace involvement:
Sense — TSENS (die) / PMIC ADC-TM5 (board) sample temperature and raise threshold interrupts.
Decide — the kernel
step_wisegovernor evaluates the-stepzones’ passive trips.Throttle — it drives the bound cooling device, whose real effect is in firmware/hardware: LMh clamps CPU-cluster frequency (Base kernel device tree (the SoC boot contract)), the AOP scales DDR (AOP — the Always-On Processor (RPMh / power back-end)), the CDSP throttles HVX clocks (ADSP and CDSP firmware), and GPU/NPU DCVS drop their operating points.
The -usr zones run in parallel at higher trips purely to hand telemetry to the
userspace policy daemon; the protective floor is the in-kernel/firmware path
above.
7.10.5. Provenance¶
- Source:
artifacts/boot_a/board.dts— thetsens@c222000/tsens@c223000controllers,qcom,adc-tm5(phandle0x58), and thethermal-zonesnode (95 zones: sensor bindings,tripstemperatures,cooling-maps).- Method:
Node/zone enumeration and phandle resolution (sensors
0x3a/0x3b, cooling devices0x3dGPU,0x53CDSP,0x3fcpu-isolate,0x58ADC-TM5); millidegree trip values converted to °C. No code executed.- Cross-refs:
Base kernel device tree (the SoC boot contract) (LMh CPU limiter, CPU topology), AOP — the Always-On Processor (RPMh / power back-end) (AOP DDR thermal manager), ADSP and CDSP firmware (CDSP HVX/sysmon throttle, ADSP
/therm/sensor, modem/RF leftovers), PMIC reset timers, charging and reachability (PMIC ADC thermistor channels), Bluetooth / FM controller firmware (WCN3990 “Cherokee”) (WCN3990cwlanzone).